a) Verify that the watchdog timer has not be enabled by mistake. If it times-out unexpectedly, it will reset the processor. Of course Mathias accurately emulates this. It is possible that the processor continues to be reset by the watchdog before it reaches the intended breakpoint. Place a breakpoint at the start-up location. This should stabilize things by letting you know for sure that the processor was reset. Normally, one will do ALL debugging without the watchdog enabled. At the very end of the debugging cycle, you then analyze your worst case paths and decide where you should "kick the dog" to insure that it never times-out unless the processor went stupid. At this point, of course, you will do considerable testing with the watchdog enabled. In this case, set a breakpoint on the initial start-up location to insure that you reliably detect every reset.

Remember that if you are running the emulator at a clock speed other than the final system clock speed that the watchdog time out values may need to be adjusted to compensate. If you have an XX Family Module, you can alternately enable the 'Break on Watchdog Timeout' option.